Digital logic circuits are built from switches that connect output signals to Vdd or GND depending on the state of input signals. The figure below shows examples of electric logic circuits built from manual switches. The “Series AND” switches on left show that switches connected in series can perform an AND operation: both SWA and SWB must be closed for the LED to illuminate. The “Parallel OR” switches on the right show that switches connected in parallel can perform an OR operation – if either SWA or SWB is closed, the LED is illuminated.
The behavior of these mechanical-switch logic circuits can be concisely described using the truth tables below. If we assume that ‘0’ is analogous to an open (non-conducting) switch, and ‘1’ to a closed (conducting) switch, then we can use a conventional truth table to show the behavior of the switches under all input conditions.
Note the series AND circuit can show both the AND relationship and the OR relationship: The LED is ON (or Y = ‘1’) if SWA AND SWB are closed; and LED is OFF (or Y = ‘0’) if SWA OR SWB are open. All logic systems can be interpreted as implementing either an AND or an OR relationship – which interpretation is used is contextual, and up to the user. The parallel OR circuit can also be interpreted as implementing either an AND or an OR relationship – can you see how?
Semiconductor-based Electronic Switches
The switches shown above are electric, but not electronic. If they were replaced by electronic switches, then they could be turned on or off by a signal, rather than by a finger press. Using semiconductors, we can build such switches. Semiconductor materials like silicon form regular crystalline structures that are relatively poor conductors. But, if some of the atoms in the silicon crystal are replaced with other atoms that have extra valence electrons (n-type dopant) or fewer valence electrons (p-type dopant), conductivity can be greatly increased. The process of replacing some fraction of silicon atoms (on the order of 1 per million) with other atoms that have a positive or negative charge is known as “doping”. Over the last few decades, manufacturing process have improved to the point where it is possible to precisely control the doping process, and to create uniformly doped areas as small as 1/10000 of a millimeter.
The manufacturing process starts with the production of large silicon crystal (around 300mm in diameter, and 2.5 meters long) that is more than 99.9999 pure. Wafers less than 1mm thick are cut from the crystal, polished to almost perfect flatness, and very lightly doped with negative ions.
Using an exacting and highly controlled process, dopant atoms are implanted into exceedingly small areas of the silicon matrix beneath the surface of the wafer. These small “diffusion” regions in and under the wafer surface create small areas of increased conductivity, and the implanted charges are free to move about within the diffusion area. Next, a thin insulating layer is created on top of the wafer between these diffusion regions, and then metal conductors are “grown” on top of the insulator and over the diffusion areas.
The area immediately under the insulation is called the channel, the metal on top of the insulation is called the “gate”, and the metal wires attached to the diffusion areas are external connection points called the “source” and the “drain”. The structure is entirely symmetric, so the source and drain labels only have meaning when the device is placed in a circuit. This structure forms an electronic switch. Current can flow into the source and out of the drain, and a voltage signal on the gate sets the channel impedance, and so determines how much current flows.
In operation, a voltage ranging between Vdd and GND is placed on the gate. Since a thin insulation layer exists, no current can flow from the gate to the source or the drain. But the presence of charge on the gate creates an electric field, and that field causes the mobile charges in the silicon bulk to migrate to or from the channel area. As the voltage on the gate changes, the amount of charge in the channel changes, and so the conductivity of the switch changes. In digital circuits, signals are binary, and only two voltages (Vdd or ‘1’, and GND or ‘0’) are placed on the gate. These two voltages are at the outer limits of the power supply, and turn the FET all the way ON, or all the way OFF.
The switches transform their resistance based on the strength of the electric field produced by the gate. From “transform” and “resistor”, we get the portmanteau “transistor”. Several different types of transistors have been created. The transistors described here are called “field effect transistors” (or FETs) because they operate in response to an electric field. Two different FETs have been described – a negative channel FET (nFET) that is conductive when the channel is full of negative charge carriers; and a positive channel FET (pFET) that is conductive when the channel is full of positive charge carries.
An nFET uses negatively charged diffusion areas, and it is ON and conducting when negative charge carriers have collected in the channel. Because an nFET uses negative charge carriers, its source is connected to the source of negative charge, or GND.
When an nFET’s gate is connected to Vdd, positive charges collect on the gate and attract negative charges into the channel, turning the nFET ON so that current can pass between the source and drain. An nFET’s most conductive state occurs when the gate voltage is at Vdd.
When an nFET’s gate is connected to GND, negative charges collect on the gate and attract positive charges into the channel, turning the nFET OFF. As shown in the figures, when the charge in the channel is opposite the charge in the diffusion area, back-to-back diodes are formed, preventing current flow in either direction. An nFET’s most resistive state occurs when the gate voltage is at GND.
A pFET uses positively charged diffusion areas, and it is ON and conducting when positive charge carriers have collected in the channel. Because a pFET uses positive charge carriers, its source is connected to the source of positive charge, or Vdd.
When an pFET’s gate is connected to GND, negative charges collect on the gate and attract positive charges into the channel, turning the nFET ON so that current can pass between the source and drain. An nFET’s most conductive state occurs when the gate voltage is at GND.
When an pFET’s gate is connected to Vdd, positive charges collect on the gate and attract negative charges into the channel, turning the pFET OFF. As shown in the figures, when the charge in the channel is opposite the charge in the diffusion area, back-to-back diodes are formed, preventing current flow in either direction. A pFET’s most resistive state occurs when the gate voltage is at Vdd.
Due to their several desirable properties, nFETs and pFETs are the standard components used to build the vast majority of all digital circuits: they can be manufactured in extremely small areas; they are very low power, because the gate insulation stops current from flowing through the gate and they are very high impedance when OFF; they use low-cost materials that are plentiful and relatively easy to work with; and they are relatively robust.
The standard schematic symbols for nFETs and pFETs are shown below. When used in digital circuits, FETs may be thought of as on-off switches, analogous to the mechanical switches discussed above, because the gate signals are always driven to the rails. When a pFET gate is driven to a ‘1’, or an nFET gate to ‘0’, they are very high resistance and almost no current flows; when a pFET gate is driven to a ‘0’ or an nFET to a ‘1’, they are very low resistance – just like a mechanical switch. And like mechanical switches, FETs can be used in series or in parallel to make AND’ing and OR’ing circuits. In the next section, logic circuits built from FETs are examined.