Registers

An Overview of Register Architectures

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Registers are collections of one or more D-flip-flops that share a common clock and reset signals, but that have separate data in and data out signals. The most common register form, parallel-in parallel-out (or PIPO), are used to memorize data busses transporting binary numbers. They are commonly used to hold input and/or output data for data-path circuits, or to hold working state (or status) information about a circuit.

Serial-in, serial out (SISO) registers are commonly called “shift registers”. They memorize a single input at every clock edge, and then move the memorized data down the chain of flip-flops until the data is presented at the output signal n clocks later. The SIPO register is a more general variation of the SISO register (all the bits are brought to output ports). It is also generally called a shift register, and it can be used in place of a SISO register. Shift registers are commonly used on the receiving end of serial communications systems (like USB, Ethernet, WIFI, etc.) to record serial-in data, and then to make that data available as a parallel data element.

Figure 1. PIPO, SISO, and SIPO registers
Figure 1. PIPO, SISO, and SIPO registers

The PSIO register includes a 2:1 mux on flip-flop inputs so that either serial or parallel data can be loaded. The parallel load option is commonly used on the transmitting end of serial communications systems, so parallel data can be loaded by the processor, and then sent out one bit at a time.

The universal register, as the name implies, can be used as a PIPO, SISO, SIPO, or PISO register.

Figure 1. PISO and universal registers
Figure 1. PISO and universal registers