Structural Verilog for combinational circuits

In this project, you will tackle a slightly more complex digital system built from two Verilog modules introduced in the previous project. To create a new Verilog source file that reuses previously designed modules, you can retype the modules and merge them into one larger Verilog description, or you can instantiate the modules as components in the new higher-level design. Reusing previously designed Verilog modules as components in a new, higher-level design creates a hierarchical design, and hierarchical designs use structural Verilog.