Circuit Delays and Glitches

When electric signals (0's and 1's) pass through logic gates, they turn on and/or off transistors that charge or discharge the capacitance on output signals. Current must flow from the power rails to the output node, and this takes time. The time required to charge or discharge output nodes can be lumped into a single gate delay. Although small, gate delays cannot be ignored in digital design this project examines the effects of these gate delays.